Semiconductor device performance is dependent upon numerous factors, one being the total device resistance. The total device resistance is, in turn, a function of parameters such as contact resistance, wiring resistance, channel resistance, etc. Decreasing the total device resistance can improve device performance (i.e., improve device speed).
As CMOS devices scale further downward, the contact resistance becomes a higher portion of the total resistance due to the fact that channel resistance decreases while metal contact resistance increases with the scaling trend. The contact resistance is dictated by the contact area, barrier height, and silicon doping concentration. However, contact area is constrained by any given scaling rule, and doping concentration is already at a maximum level in current CMOS technology. The barrier height of metal contacts, however, remains a viable avenue for improvements in contact resistance.
One type of material commonly employed in fabricating metal contacts is metal silicides, such as Cobalt silicide or Nickel silicide. Cobalt silicide, and other metal silicides, are typically fabricated using a conventional self-aligned silicide (salicide) process, wherein a blanket TiN/Co film is deposited over the devices and annealed to form Cobalt monosilicide over the exposed silicon regions (source, drain and gate) of transistors. A selective wet etch is employed to remove the TiN cap and the non-reacted Cobalt left over the oxide or nitride regions. The Cobalt monosilicide is then subjected to a second anneal which converts the monosilicide into a Cobalt disilicide layer. Such Cobalt silicides and Nickel silicides are referred to as mid-gap metals because their workfunction is between the workfunction of n-type and p-type semiconductors. They can be used as a contact metal for both n-type and p-type devices with certain contact resistance.
In know structures, a contact stud is formed over the silicide contact by first etching a trench through an interlayer dielectric (and, possibly, through an optional etch stop nitride layer) to the top surface of the silicide contact. The trench is subsequently filled with metal (e.g., tungsten by CVD, or copper by electroplating) to form a contact stud that is in direct contact with the silicide contact.
To further reduce total resistance, it has been suggested to use different silicide materials for the respective n-type and p-type areas of a circuit. However, this is generally not a financially suitable solution since it adds many additional processing steps to the overall fabrication scheme.
Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.